Updated on 2024/05/02

写真a

 
Toshinori Numata
 
Organization
Graduate School of Engineering Department of Advanced Science and Technology Electronics and Information Engineering Functional Semiconductor Devices Professor   
Degree
博士(工学) ( 2006.3   大阪大学 )

Research Areas

  • Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering) / Electric and electronic materials

Main research papers

  • SPICE-based performance analysis of Trigate silicon nanowire CMOS circuits

    C. Tanaka*, M. Saitoh*, K. Ota*, K. Uchida*, and T. Numata

    IEEE Transactions on Electron Devices   60 ( 4 )   1451   2013.4.1

    Threshold voltage control by substrate bias in 10-nm-diameter tri-gate nanowire MOSFET on ultrathin BOX

    K. Ota*, M. Saitoh*, C. Tanaka*, and T. Numata

    IEEE Electron Device Letters   34 ( 2 )   187   2013.2.1

    Impact of mechanical stress on gate tunneling currents of germanium and silicon p-type metal-oxide-semiconductor field-effect transistors and metal gate work function

    Y. S. Choi*, T. Numata, T. Nishida*, R. Harris*, and S. E. Thompson*

    Journal of Applied Physics   103   064510   2008.3.24

    Performance Enhancement of Partially and Fully Depleted Strained-SOI MOSFETs

    T. Numata, T. Irisawa*, T. Tezuka*, J. Koga*, N. Hirashita*, K. Usuda*, E. Toyoda*, Y. Miyamura*, A. Tanabe*, N. Sugiyama*, and S. Takagi*

    IEEE Transactions on Electron Devices   53 ( 5 )   1030   2006.5.1

    Device Design For Subthreshold Slope and Threshold Voltage Control in Sub-100-nm Fully Depleted SOI MOSFETs

    T. Numata and S. Takagi*

    IEEE Transactions on Electron Devices   51 ( 12 )   2161   2004.12.1

Research History

  • Toyota Technological Institute   Graduate School of Engineering Department of Advanced Science and Technology Electronics and Information Engineering Functional Semiconductor Devices   Professor

    2024.1

  • Yokohama National University

    2023.4 - 2023.12

  • Tokyo City University

    2021.4 - 2023.12

  • キオクシア(株)   グループ長

    2019.4 - 2023.12

  • 東芝メモリ(株)   参事

    2017.4 - 2019.3

  • Tokyo City University

    2015.4 - 2018.3

  • Interuniversity Microelectronics Centre (imec)   On-siete Manager

    2012.5 - 2015.3

  • University of Florida   Visiting Schalar

    1997.7 - 1998.12

  • (株)東芝   研究開発センター   研究員

    1997.4 - 2017.4

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Education

  • Osaka University

    1995.4 - 1997.3

  • Osaka University

    1991.4 - 1995.3

Professional Memberships

  • Institute of Electical and Electronics Engineers (IEEE)

  • 応用物理学会